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gpio.h
Go to the documentation of this file.
1
13#ifndef __PHAL_G4_GPIO_H__
14#define __PHAL_G4_GPIO_H__
15
16#include "common/phal_G4/phal_G4.h"
17
21typedef enum {
22 GPIO_TYPE_INPUT = 0b00, /* Pin input mode */
23 GPIO_TYPE_OUTPUT = 0b01, /* Pin output mode */
24 GPIO_TYPE_AF = 0b10, /* Pin alternate function mode */
25 GPIO_TYPE_ANALOG = 0b11, /* Pin alternate function mode */
27
31typedef enum {
32 GPIO_OUTPUT_LOW_SPEED = 0b00, /* Slew rate control, max 8Mhz */
33 GPIO_OUTPUT_MED_SPEED = 0b01, /* Slew rate control, max 50Mhz */
34 GPIO_OUTPUT_HIGH_SPEED = 0b10, /* Slew rate control, max 100Mhz */
35 GPIO_OUTPUT_ULTRA_SPEED = 0b11, /* Slew rate control, max 180Mhz */
37
41typedef enum {
42 GPIO_OUTPUT_PUSH_PULL = 0b0, /* Drive the output pin high and low */
43 GPIO_OUTPUT_OPEN_DRAIN = 0b1, /* Drive the output pin low, high-z otherwise */
45
49typedef enum {
50 GPIO_INPUT_OPEN_DRAIN = 0b00, /* No internal pull up/down */
51 GPIO_INPUT_PULL_UP = 0b01, /* Weak internal pull-up enabled */
52 GPIO_INPUT_PULL_DOWN = 0b10, /* Weak internal pull-down enabled */
54
58typedef struct {
59 GPIO_TypeDef *bank; /* GPIO Bank for configuration */
60 uint8_t pin; /* Pin Number for configruation */
61 GPIOPinType_t type; /* Output type of pin */
62
63 struct {
64 // INPUT ONLY FIELDS
65 GPIOInputPull_t pull; /* Push/Pull selection */
66
67 // OUTPUT ONLY FIELDS
68 GPIOOutputSpeed_t ospeed; /* Output speed (slew rate) */
69 GPIOOutputPull_t otype; /* Output push/pull */
70
71 // AF ONLY FIELDS
72 uint8_t af_num; /* Anternate function type */
73 } config; /* Type specific configuration for pins */
75
83#define GPIO_INIT_INPUT(gpio_bank, pin_num, input_pull_sel) \
84 { \
85 .bank = gpio_bank, .pin = pin_num, .type = GPIO_TYPE_INPUT, .config = { \
86 .pull = input_pull_sel \
87 } \
88 }
89
97#define GPIO_INIT_OUTPUT(gpio_bank, pin_num, ospeed_sel) \
98 { \
99 .bank = gpio_bank, .pin = pin_num, .type = GPIO_TYPE_OUTPUT, .config = { \
100 .ospeed = ospeed_sel, \
101 .otype = GPIO_OUTPUT_PUSH_PULL \
102 } \
103 }
104
105#define GPIO_INIT_OUTPUT_OPEN_DRAIN(gpio_bank, pin_num, ospeed_sel) \
106 { \
107 .bank = gpio_bank, .pin = pin_num, .type = GPIO_TYPE_OUTPUT, .config = { \
108 .ospeed = ospeed_sel, \
109 .otype = GPIO_OUTPUT_OPEN_DRAIN \
110 } \
111 }
118#define GPIO_INIT_ANALOG(gpio_bank, pin_num) \
119 {.bank = gpio_bank, .pin = pin_num, .type = GPIO_TYPE_ANALOG}
120
131#define GPIO_INIT_AF(gpio_bank, pin_num, alt_func_num, ospeed_sel, otype_sel, input_pull_sel) \
132 { \
133 .bank = gpio_bank, .pin = pin_num, .type = GPIO_TYPE_AF, .config = { \
134 .af_num = alt_func_num, \
135 .ospeed = ospeed_sel, \
136 .otype = otype_sel, \
137 .pull = input_pull_sel \
138 } \
139 }
140
141/*
142 Useful defines for GPIO Init struct with commonly used peripheral/pin mappings.
143 If you find yourself adding the same pin mappings to multiple devices, add a macro below
144 to cut down on duplication.
145*/
146
156bool PHAL_initGPIO(GPIOInitConfig_t config[], uint8_t config_len);
157
166static inline bool PHAL_readGPIO(GPIO_TypeDef *bank, uint8_t pin) {
167 return (bank->IDR >> pin) & 0b1;
168}
169
170#define GPIO_INIT_USART3TX_PC10 \
171 GPIO_INIT_AF(GPIOC, \
172 10, \
173 7, \
174 GPIO_OUTPUT_ULTRA_SPEED, \
175 GPIO_OUTPUT_PUSH_PULL, \
176 GPIO_INPUT_OPEN_DRAIN)
177#define GPIO_INIT_USART3RX_PC11 \
178 GPIO_INIT_AF(GPIOC, \
179 11, \
180 7, \
181 GPIO_OUTPUT_ULTRA_SPEED, \
182 GPIO_OUTPUT_OPEN_DRAIN, \
183 GPIO_INPUT_OPEN_DRAIN)
184
185#define GPIO_INIT_USART2TX_PA2 \
186 GPIO_INIT_AF(GPIOA, 2, 7, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
187#define GPIO_INIT_USART2RX_PA3 \
188 GPIO_INIT_AF(GPIOA, \
189 3, \
190 7, \
191 GPIO_OUTPUT_ULTRA_SPEED, \
192 GPIO_OUTPUT_OPEN_DRAIN, \
193 GPIO_INPUT_OPEN_DRAIN)
194
195#define GPIO_INIT_USART1TX_PA9 \
196 GPIO_INIT_AF(GPIOA, 9, 7, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
197#define GPIO_INIT_USART1RX_PA10 \
198 GPIO_INIT_AF(GPIOA, \
199 10, \
200 7, \
201 GPIO_OUTPUT_ULTRA_SPEED, \
202 GPIO_OUTPUT_OPEN_DRAIN, \
203 GPIO_INPUT_OPEN_DRAIN)
204
205#define GPIO_INIT_USART2TX_PD5 \
206 GPIO_INIT_AF(GPIOD, 5, 7, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
207#define GPIO_INIT_USART2RX_PD6 \
208 GPIO_INIT_AF(GPIOD, \
209 6, \
210 7, \
211 GPIO_OUTPUT_ULTRA_SPEED, \
212 GPIO_OUTPUT_OPEN_DRAIN, \
213 GPIO_INPUT_OPEN_DRAIN)
214
215#define GPIO_INIT_UART4TX_PC10 \
216 GPIO_INIT_AF(GPIOC, \
217 10, \
218 8, \
219 GPIO_OUTPUT_ULTRA_SPEED, \
220 GPIO_OUTPUT_PUSH_PULL, \
221 GPIO_INPUT_OPEN_DRAIN)
222#define GPIO_INIT_UART4RX_PC11 \
223 GPIO_INIT_AF(GPIOC, \
224 11, \
225 8, \
226 GPIO_OUTPUT_ULTRA_SPEED, \
227 GPIO_OUTPUT_OPEN_DRAIN, \
228 GPIO_INPUT_OPEN_DRAIN)
229
230#define GPIO_INIT_LPUART1TX_PC0 \
231 GPIO_INIT_AF(GPIOC, 0, 8, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
232#define GPIO_INIT_LPUART1RX_PC1 \
233 GPIO_INIT_AF(GPIOC, \
234 1, \
235 8, \
236 GPIO_OUTPUT_ULTRA_SPEED, \
237 GPIO_OUTPUT_OPEN_DRAIN, \
238 GPIO_INPUT_OPEN_DRAIN)
239
240/* * SPI1 Pins (Standard for both RET and CET)
241 * PA5=SCK, PA6=MISO, PA7=MOSI, PA4 or PA15=NSS (AF5)
242 */
243#define GPIO_INIT_SPI1SCK_PA5 \
244 GPIO_INIT_AF(GPIOA, 5, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
245
246#define GPIO_INIT_SPI1MISO_PA6 \
247 GPIO_INIT_AF(GPIOA, 6, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_PULL_UP)
248
249#define GPIO_INIT_SPI1MOSI_PA7 \
250 GPIO_INIT_AF(GPIOA, 7, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
251
252#define GPIO_INIT_SPI1NSS_PA4 \
253 GPIO_INIT_AF(GPIOA, 4, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
254
255#define GPIO_INIT_SPI1NSS_PA15 \
256 GPIO_INIT_AF(GPIOA, \
257 15, \
258 5, \
259 GPIO_OUTPUT_ULTRA_SPEED, \
260 GPIO_OUTPUT_PUSH_PULL, \
261 GPIO_INPUT_OPEN_DRAIN)
262
263/* * SPI2 Pins - RET Package (64-pin)
264 * PB13=SCK, PB14=MISO, PB15=MOSI, PB12=NSS (AF5)
265 */
266#define GPIO_INIT_SPI2SCK_RET_PB13 \
267 GPIO_INIT_AF(GPIOB, \
268 13, \
269 5, \
270 GPIO_OUTPUT_ULTRA_SPEED, \
271 GPIO_OUTPUT_PUSH_PULL, \
272 GPIO_INPUT_OPEN_DRAIN)
273
274#define GPIO_INIT_SPI2MISO_RET_PB14 \
275 GPIO_INIT_AF(GPIOB, 14, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_PULL_UP)
276
277#define GPIO_INIT_SPI2MOSI_RET_PB15 \
278 GPIO_INIT_AF(GPIOB, \
279 15, \
280 5, \
281 GPIO_OUTPUT_ULTRA_SPEED, \
282 GPIO_OUTPUT_PUSH_PULL, \
283 GPIO_INPUT_OPEN_DRAIN)
284
285#define GPIO_INIT_SPI2NSS_RET_PB12 \
286 GPIO_INIT_AF(GPIOB, \
287 12, \
288 5, \
289 GPIO_OUTPUT_ULTRA_SPEED, \
290 GPIO_OUTPUT_PUSH_PULL, \
291 GPIO_INPUT_OPEN_DRAIN)
292
293/* * SPI2 Pins - CET Package (48-pin)
294 * PA9=SCK, PA10=MISO, PA11=MOSI, PA8=NSS (AF5)
295 */
296#define GPIO_INIT_SPI2SCK_CET_PA9 \
297 GPIO_INIT_AF(GPIOA, 9, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
298
299#define GPIO_INIT_SPI2MISO_CET_PA10 \
300 GPIO_INIT_AF(GPIOA, 10, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_PULL_UP)
301
302#define GPIO_INIT_SPI2MOSI_CET_PA11 \
303 GPIO_INIT_AF(GPIOA, \
304 11, \
305 5, \
306 GPIO_OUTPUT_ULTRA_SPEED, \
307 GPIO_OUTPUT_PUSH_PULL, \
308 GPIO_INPUT_OPEN_DRAIN)
309
310#define GPIO_INIT_SPI2NSS_CET_PA8 \
311 GPIO_INIT_AF(GPIOA, 8, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
312
320static inline void PHAL_writeGPIO(GPIO_TypeDef *bank, uint8_t pin, bool value) {
321 bank->BSRR |=
322 1 << ((!value << 4) | pin); // BSRR has "set" as bottom 16 bits and "reset" as top 16
323}
324
325static inline void PHAL_toggleGPIO(GPIO_TypeDef *bank, uint8_t pin) {
326 PHAL_writeGPIO(bank, pin, !PHAL_readGPIO(bank, pin));
327}
328
329#endif // __PHAL_G4_GPIO_H__
GPIOOutputPull_t
Output drive mode selection.
Definition gpio.h:75
GPIOPinType_t
Configuration type for GPIO Pin.
Definition gpio.h:55
bool PHAL_initGPIO(GPIOInitConfig_t config[], uint8_t config_len)
Initilize the GPIO perpheral given a list of configuration fields for all of the GPIO pins....
Definition gpio.c:3
GPIOInputPull_t
Enable internal pullup/down resistors.
Definition gpio.h:83
GPIOOutputSpeed_t
Slew rate control for output pins.
Definition gpio.h:65
Configuration entry for GPIO initilization.
Definition gpio.h:93