13#ifndef __PHAL_G4_GPIO_H__
14#define __PHAL_G4_GPIO_H__
16#include "common/phal_G4/phal_G4.h"
22 GPIO_TYPE_INPUT = 0b00,
23 GPIO_TYPE_OUTPUT = 0b01,
25 GPIO_TYPE_ANALOG = 0b11,
32 GPIO_OUTPUT_LOW_SPEED = 0b00,
33 GPIO_OUTPUT_MED_SPEED = 0b01,
34 GPIO_OUTPUT_HIGH_SPEED = 0b10,
35 GPIO_OUTPUT_ULTRA_SPEED = 0b11,
42 GPIO_OUTPUT_PUSH_PULL = 0b0,
43 GPIO_OUTPUT_OPEN_DRAIN = 0b1,
50 GPIO_INPUT_OPEN_DRAIN = 0b00,
51 GPIO_INPUT_PULL_UP = 0b01,
52 GPIO_INPUT_PULL_DOWN = 0b10,
83#define GPIO_INIT_INPUT(gpio_bank, pin_num, input_pull_sel) \
85 .bank = gpio_bank, .pin = pin_num, .type = GPIO_TYPE_INPUT, .config = { \
86 .pull = input_pull_sel \
97#define GPIO_INIT_OUTPUT(gpio_bank, pin_num, ospeed_sel) \
99 .bank = gpio_bank, .pin = pin_num, .type = GPIO_TYPE_OUTPUT, .config = { \
100 .ospeed = ospeed_sel, \
101 .otype = GPIO_OUTPUT_PUSH_PULL \
105#define GPIO_INIT_OUTPUT_OPEN_DRAIN(gpio_bank, pin_num, ospeed_sel) \
107 .bank = gpio_bank, .pin = pin_num, .type = GPIO_TYPE_OUTPUT, .config = { \
108 .ospeed = ospeed_sel, \
109 .otype = GPIO_OUTPUT_OPEN_DRAIN \
118#define GPIO_INIT_ANALOG(gpio_bank, pin_num) \
119 {.bank = gpio_bank, .pin = pin_num, .type = GPIO_TYPE_ANALOG}
131#define GPIO_INIT_AF(gpio_bank, pin_num, alt_func_num, ospeed_sel, otype_sel, input_pull_sel) \
133 .bank = gpio_bank, .pin = pin_num, .type = GPIO_TYPE_AF, .config = { \
134 .af_num = alt_func_num, \
135 .ospeed = ospeed_sel, \
136 .otype = otype_sel, \
137 .pull = input_pull_sel \
166static inline bool PHAL_readGPIO(GPIO_TypeDef *bank, uint8_t pin) {
167 return (bank->IDR >> pin) & 0b1;
170#define GPIO_INIT_USART3TX_PC10 \
171 GPIO_INIT_AF(GPIOC, \
174 GPIO_OUTPUT_ULTRA_SPEED, \
175 GPIO_OUTPUT_PUSH_PULL, \
176 GPIO_INPUT_OPEN_DRAIN)
177#define GPIO_INIT_USART3RX_PC11 \
178 GPIO_INIT_AF(GPIOC, \
181 GPIO_OUTPUT_ULTRA_SPEED, \
182 GPIO_OUTPUT_OPEN_DRAIN, \
183 GPIO_INPUT_OPEN_DRAIN)
185#define GPIO_INIT_USART2TX_PA2 \
186 GPIO_INIT_AF(GPIOA, 2, 7, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
187#define GPIO_INIT_USART2RX_PA3 \
188 GPIO_INIT_AF(GPIOA, \
191 GPIO_OUTPUT_ULTRA_SPEED, \
192 GPIO_OUTPUT_OPEN_DRAIN, \
193 GPIO_INPUT_OPEN_DRAIN)
195#define GPIO_INIT_USART1TX_PA9 \
196 GPIO_INIT_AF(GPIOA, 9, 7, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
197#define GPIO_INIT_USART1RX_PA10 \
198 GPIO_INIT_AF(GPIOA, \
201 GPIO_OUTPUT_ULTRA_SPEED, \
202 GPIO_OUTPUT_OPEN_DRAIN, \
203 GPIO_INPUT_OPEN_DRAIN)
205#define GPIO_INIT_USART2TX_PD5 \
206 GPIO_INIT_AF(GPIOD, 5, 7, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
207#define GPIO_INIT_USART2RX_PD6 \
208 GPIO_INIT_AF(GPIOD, \
211 GPIO_OUTPUT_ULTRA_SPEED, \
212 GPIO_OUTPUT_OPEN_DRAIN, \
213 GPIO_INPUT_OPEN_DRAIN)
215#define GPIO_INIT_UART4TX_PC10 \
216 GPIO_INIT_AF(GPIOC, \
219 GPIO_OUTPUT_ULTRA_SPEED, \
220 GPIO_OUTPUT_PUSH_PULL, \
221 GPIO_INPUT_OPEN_DRAIN)
222#define GPIO_INIT_UART4RX_PC11 \
223 GPIO_INIT_AF(GPIOC, \
226 GPIO_OUTPUT_ULTRA_SPEED, \
227 GPIO_OUTPUT_OPEN_DRAIN, \
228 GPIO_INPUT_OPEN_DRAIN)
230#define GPIO_INIT_LPUART1TX_PC0 \
231 GPIO_INIT_AF(GPIOC, 0, 8, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
232#define GPIO_INIT_LPUART1RX_PC1 \
233 GPIO_INIT_AF(GPIOC, \
236 GPIO_OUTPUT_ULTRA_SPEED, \
237 GPIO_OUTPUT_OPEN_DRAIN, \
238 GPIO_INPUT_OPEN_DRAIN)
243#define GPIO_INIT_SPI1SCK_PA5 \
244 GPIO_INIT_AF(GPIOA, 5, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
246#define GPIO_INIT_SPI1MISO_PA6 \
247 GPIO_INIT_AF(GPIOA, 6, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_PULL_UP)
249#define GPIO_INIT_SPI1MOSI_PA7 \
250 GPIO_INIT_AF(GPIOA, 7, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
252#define GPIO_INIT_SPI1NSS_PA4 \
253 GPIO_INIT_AF(GPIOA, 4, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
255#define GPIO_INIT_SPI1NSS_PA15 \
256 GPIO_INIT_AF(GPIOA, \
259 GPIO_OUTPUT_ULTRA_SPEED, \
260 GPIO_OUTPUT_PUSH_PULL, \
261 GPIO_INPUT_OPEN_DRAIN)
266#define GPIO_INIT_SPI2SCK_RET_PB13 \
267 GPIO_INIT_AF(GPIOB, \
270 GPIO_OUTPUT_ULTRA_SPEED, \
271 GPIO_OUTPUT_PUSH_PULL, \
272 GPIO_INPUT_OPEN_DRAIN)
274#define GPIO_INIT_SPI2MISO_RET_PB14 \
275 GPIO_INIT_AF(GPIOB, 14, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_PULL_UP)
277#define GPIO_INIT_SPI2MOSI_RET_PB15 \
278 GPIO_INIT_AF(GPIOB, \
281 GPIO_OUTPUT_ULTRA_SPEED, \
282 GPIO_OUTPUT_PUSH_PULL, \
283 GPIO_INPUT_OPEN_DRAIN)
285#define GPIO_INIT_SPI2NSS_RET_PB12 \
286 GPIO_INIT_AF(GPIOB, \
289 GPIO_OUTPUT_ULTRA_SPEED, \
290 GPIO_OUTPUT_PUSH_PULL, \
291 GPIO_INPUT_OPEN_DRAIN)
296#define GPIO_INIT_SPI2SCK_CET_PA9 \
297 GPIO_INIT_AF(GPIOA, 9, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
299#define GPIO_INIT_SPI2MISO_CET_PA10 \
300 GPIO_INIT_AF(GPIOA, 10, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_PULL_UP)
302#define GPIO_INIT_SPI2MOSI_CET_PA11 \
303 GPIO_INIT_AF(GPIOA, \
306 GPIO_OUTPUT_ULTRA_SPEED, \
307 GPIO_OUTPUT_PUSH_PULL, \
308 GPIO_INPUT_OPEN_DRAIN)
310#define GPIO_INIT_SPI2NSS_CET_PA8 \
311 GPIO_INIT_AF(GPIOA, 8, 5, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
320static inline void PHAL_writeGPIO(GPIO_TypeDef *bank, uint8_t pin,
bool value) {
322 1 << ((!value << 4) | pin);
325static inline void PHAL_toggleGPIO(GPIO_TypeDef *bank, uint8_t pin) {
326 PHAL_writeGPIO(bank, pin, !PHAL_readGPIO(bank, pin));
GPIOOutputPull_t
Output drive mode selection.
Definition gpio.h:75
GPIOPinType_t
Configuration type for GPIO Pin.
Definition gpio.h:55
bool PHAL_initGPIO(GPIOInitConfig_t config[], uint8_t config_len)
Initilize the GPIO perpheral given a list of configuration fields for all of the GPIO pins....
Definition gpio.c:3
GPIOInputPull_t
Enable internal pullup/down resistors.
Definition gpio.h:83
GPIOOutputSpeed_t
Slew rate control for output pins.
Definition gpio.h:65
Configuration entry for GPIO initilization.
Definition gpio.h:93