adc.h File Reference

#include "common/phal_G4/phal_G4.h"

Go to the source code of this file.

Classes
struct	ADCInitConfig_t
struct	ADCChannelConfig_t

Macros
#define	ADC1_CH1_GPIO_Port   (GPIOA)
#define	ADC1_CH1_Pin   (0)
#define	ADC1_CH2_GPIO_Port   (GPIOA)
#define	ADC1_CH2_Pin   (1)
#define	ADC1_CH3_GPIO_Port   (GPIOA)
#define	ADC1_CH3_Pin   (2)
#define	ADC1_CH4_GPIO_Port   (GPIOA)
#define	ADC1_CH4_Pin   (3)
#define	ADC1_DMA_CONT_CONFIG(mem_addr_, tx_size_, priority_)

Enumerations
enum	ADCResolution_t { ADC_RES_12_BIT = 0b00 , ADC_RES_10_BIT = 0b01 , ADC_RES_8_BIT = 0b10 , ADC_RES_6_BIT = 0b11 }
enum	ADCClkPrescaler_t {   ADC_CLK_PRESC_0 = 0b0000 , ADC_CLK_PRESC_2 = 0b0001 , ADC_CLK_PRESC_4 = 0b0010 , ADC_CLK_PRESC_6 = 0b0011 ,   ADC_CLK_PRESC_8 = 0b0100 }
enum	ADCDMAMode_t { ADC_DMA_OFF = 0b00 , ADC_DMA_ONESHOT = 0b01 , ADC_DMA_CIRCULAR = 0b11 }
enum	ADCDataAlign_t { ADC_DATA_ALIGN_RIGHT = 0b0 , ADC_DATA_ALIGN_LEFT = 0b1 }
enum	ADCOversampleCount_t {   ADC_OVERSAMPLE_NONE = 0 , ADC_OVERSAMPLE_2 = 2 , ADC_OVERSAMPLE_4 = 4 , ADC_OVERSAMPLE_8 = 8 ,   ADC_OVERSAMPLE_16 = 16 , ADC_OVERSAMPLE_32 = 32 , ADC_OVERSAMPLE_64 = 64 , ADC_OVERSAMPLE_128 = 128 ,   ADC_OVERSAMPLE_256 = 256 }
enum	ADCChannelSampleCycles_t {   ADC_CHN_SMP_CYCLES_3 = 0b000 , ADC_CHN_SMP_CYCLES_15 = 0b001 , ADC_CHN_SMP_CYCLES_28 = 0b010 , ADC_CHN_SMP_CYCLES_56 = 0b011 ,   ADC_CHN_SMP_CYCLES_84 = 0b100 , ADC_CHN_SMP_CYCLES_112 = 0b101 , ADC_CHN_SMP_CYCLES_144 = 0b110 , ADC_CHN_SMP_CYCLES_480 = 0b111 }
enum	ADCChannel_t { ADC_CHANNEL_1 = 1 , ADC_CHANNEL_2 = 2 , ADC_CHANNEL_3 = 3 , ADC_CHANNEL_4 = 4 }

Functions
bool	PHAL_initADC (ADCInitConfig_t *config, ADCChannelConfig_t channels[], uint8_t num_channels)
	Initializes the ADC, requires GPIO config prior.
bool	PHAL_startADC (ADCInitConfig_t *config)
	Starts the ADC conversions, requires PHAL_initADC to be called prior.
bool	PHAL_stopADC (ADCInitConfig_t *config)
	Stops the ADC conversions, requires PHAL_initADC to be called prior.
uint16_t	PHAL_readADC (ADCInitConfig_t *config)
	Reads the ADC data register.

Detailed Description

Author

Chris McGalliard - port of L4 HAL by Luke Oxley (lcoxl.nosp@m.ey@p.nosp@m.urdue.nosp@m..edu)

Version

0.1

Date

2023-09-17

Macro Definition Documentation

ADC1_DMA_CONT_CONFIG

#define ADC1_DMA_CONT_CONFIG	(		mem_addr_,
			tx_size_,
			priority_ )

Value:

    {.periph_addr      = (uint32_t)&(ADC1->DR), \
     .mem_addr         = mem_addr_, \
     .tx_size          = tx_size_, \
     .increment        = true, \
     .circular         = true, \
     .dir              = 0b0, \
     .mem_inc          = true, \
     .periph_inc       = false, \
     .mem_to_mem       = false, \
     .priority         = priority_, \
     .mem_size         = DMA_SIZE_16BIT, \
     .periph_size      = DMA_SIZE_16BIT, \
     .tx_isr_en        = false, \
     .dma_chan_request = 0b0000, \
     .channel_idx      = 1, \
     .mux_request      = DMA_REQUEST_ADC1, \
     .periph           = DMA1, \
     .channel          = DMA1_Channel1}

Function Documentation

PHAL_initADC()

bool PHAL_initADC	(	ADCInitConfig_t *	config,
		ADCChannelConfig_t	channels[],
		uint8_t	num_channels )

Initializes the ADC, requires GPIO config prior.

Parameters

adc	ADC handle
config	ADC initial config settings
channels	List of channel configurations
num_channels	Number of channels in the channel configuration list

PHAL_readADC()

uint16_t PHAL_readADC

(

ADCInitConfig_t *

config

)

Reads the ADC data register.

Parameters

adc	ADC handle

Returns

contents of the data register

PHAL_startADC()

bool PHAL_startADC

(

ADCInitConfig_t *

config

)

Starts the ADC conversions, requires PHAL_initADC to be called prior.

Parameters

adc	ADC handle

PHAL_stopADC()

bool PHAL_stopADC

(

ADCInitConfig_t *

config

)

Stops the ADC conversions, requires PHAL_initADC to be called prior.

Parameters

adc	ADC handle