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spi.h
1
8#ifndef _PHAL_G4_SPI_H
9#define _PHAL_G4_SPI_H
10
11#include <stddef.h>
12
13#include "common/phal_G4/dma/dma.h"
14#include "common/phal_G4/gpio/gpio.h"
15#include "common/phal_G4/phal_G4.h"
16#include "common/phal_G4/rcc/rcc.h"
17#include "common_defs.h"
18
19typedef uint32_t ptr_int;
20
21typedef enum {
22 SPI_MODE_MASTER = 0,
23 SPI_MODE_SLAVE = 1,
24} SPI_Mode;
25
26typedef struct {
27 uint32_t data_rate;
28 uint8_t data_len;
29 SPI_Mode mode;
30 bool nss_sw;
31 GPIO_TypeDef *nss_gpio_port;
32 uint32_t nss_gpio_pin;
33
34 uint8_t cpol;
35 uint8_t cpha;
36
37 dma_init_t *rx_dma_cfg; // DMA RX config (optional)
38 dma_init_t *tx_dma_cfg; // DMA TX config (required for DMA path)
39
40 volatile bool _busy; // Busy flag
41 volatile bool _error; // TX error occurred
42 volatile bool _direct_mode_error;
43 volatile bool _fifo_overrun;
44
45 SPI_TypeDef *periph; // SPI peripheral base
46} SPI_InitConfig_t;
47
48bool PHAL_SPI_init(SPI_InitConfig_t *handle);
49bool PHAL_SPI_transfer(SPI_InitConfig_t *spi,
50 const uint8_t *out_data,
51 const uint32_t data_len,
52 uint8_t *in_data);
53bool PHAL_SPI_transfer_noDMA(SPI_InitConfig_t *spi,
54 const uint8_t *out_data,
55 uint32_t txlen,
56 uint32_t rxlen,
57 uint8_t *in_data);
58bool PHAL_SPI_busy(SPI_InitConfig_t *cfg);
59uint8_t PHAL_SPI_writeByte(SPI_InitConfig_t *spi, uint8_t address, uint8_t writeDat);
60uint8_t PHAL_SPI_readByte(SPI_InitConfig_t *spi, uint8_t address, bool skipDummy);
61void PHAL_SPI_ForceReset(SPI_InitConfig_t *spi);
62
63#define SPI1_RXDMA_CONT_CONFIG(rx_addr_, priority_) \
64 {.periph_addr = (uint32_t)&(SPI1->DR), \
65 .mem_addr = (uint32_t)(rx_addr_), \
66 .tx_size = 1, \
67 .mem_size = DMA_SIZE_8BIT, \
68 .increment = false, \
69 .circular = false, \
70 .dir = 0, /* P2M */ \
71 .mem_inc = true, \
72 .periph_inc = false, \
73 .mem_to_mem = false, \
74 .priority = (priority_), \
75 .periph_size = DMA_SIZE_8BIT, \
76 .tx_isr_en = false, \
77 .dma_chan_request = 0, \
78 .channel_idx = 2, /* DMA1 Channel2 typical for SPI1_RX */ \
79 .mux_request = DMA_REQUEST_SPI1_RX, \
80 .periph = DMA1}
81
82#define SPI1_TXDMA_CONT_CONFIG(tx_addr_, priority_) \
83 {.periph_addr = (uint32_t)&(SPI1->DR), \
84 .mem_addr = (uint32_t)(tx_addr_), \
85 .tx_size = 1, \
86 .mem_size = DMA_SIZE_8BIT, \
87 .increment = false, \
88 .circular = false, \
89 .dir = 1, /* M2P */ \
90 .mem_inc = true, \
91 .periph_inc = false, \
92 .mem_to_mem = false, \
93 .priority = (priority_), \
94 .periph_size = DMA_SIZE_8BIT, \
95 .tx_isr_en = true, \
96 .dma_chan_request = 0, \
97 .channel_idx = 3, /* DMA1 Channel3 typical for SPI1_TX */ \
98 .mux_request = DMA_REQUEST_SPI1_TX, \
99 .periph = DMA1}
100
101/* SPI2 */
102#define SPI2_RXDMA_CONT_CONFIG(rx_addr_, priority_) \
103 {.periph_addr = (uint32_t)&(SPI2->DR), \
104 .mem_addr = (uint32_t)(rx_addr_), \
105 .tx_size = 1, \
106 .mem_size = DMA_SIZE_8BIT, \
107 .increment = false, \
108 .circular = false, \
109 .dir = 0, \
110 .mem_inc = true, \
111 .periph_inc = false, \
112 .mem_to_mem = false, \
113 .priority = (priority_), \
114 .periph_size = DMA_SIZE_8BIT, \
115 .tx_isr_en = false, \
116 .dma_chan_request = 0, \
117 .channel_idx = 4, /* DMA1 Channel4 typical for SPI2_RX */ \
118 .mux_request = DMA_REQUEST_SPI2_RX, \
119 .periph = DMA1}
120
121#define SPI2_TXDMA_CONT_CONFIG(tx_addr_, priority_) \
122 {.periph_addr = (uint32_t)&(SPI2->DR), \
123 .mem_addr = (uint32_t)(tx_addr_), \
124 .tx_size = 1, \
125 .mem_size = DMA_SIZE_8BIT, \
126 .increment = false, \
127 .circular = false, \
128 .dir = 1, \
129 .mem_inc = true, \
130 .periph_inc = false, \
131 .mem_to_mem = false, \
132 .priority = (priority_), \
133 .periph_size = DMA_SIZE_8BIT, \
134 .tx_isr_en = true, \
135 .dma_chan_request = 0, \
136 .channel_idx = 5, /* DMA1 Channel5 typical for SPI2_TX */ \
137 .mux_request = DMA_REQUEST_SPI2_TX, \
138 .periph = DMA1}
139
140/* SPI3 */
141#define SPI3_RXDMA_CONT_CONFIG(rx_addr_, priority_) \
142 {.periph_addr = (uint32_t)&(SPI3->DR), \
143 .mem_addr = (uint32_t)(rx_addr_), \
144 .tx_size = 1, \
145 .mem_size = DMA_SIZE_8BIT, \
146 .increment = false, \
147 .circular = false, \
148 .dir = 0, \
149 .mem_inc = true, \
150 .periph_inc = false, \
151 .mem_to_mem = false, \
152 .priority = (priority_), \
153 .periph_size = DMA_SIZE_8BIT, \
154 .tx_isr_en = false, \
155 .dma_chan_request = 0, \
156 .channel_idx = 2, /* DMA2 Channel2 example */ \
157 .mux_request = DMA_REQUEST_SPI3_RX, \
158 .periph = DMA2}
159
160#define SPI3_TXDMA_CONT_CONFIG(tx_addr_, priority_) \
161 {.periph_addr = (uint32_t)&(SPI3->DR), \
162 .mem_addr = (uint32_t)(tx_addr_), \
163 .tx_size = 1, \
164 .mem_size = DMA_SIZE_8BIT, \
165 .increment = false, \
166 .circular = false, \
167 .dir = 1, \
168 .mem_inc = true, \
169 .periph_inc = false, \
170 .mem_to_mem = false, \
171 .priority = (priority_), \
172 .periph_size = DMA_SIZE_8BIT, \
173 .tx_isr_en = true, \
174 .dma_chan_request = 0, \
175 .channel_idx = 3, /* DMA2 Channel3 example */ \
176 .mux_request = DMA_REQUEST_SPI3_TX, \
177 .periph = DMA2}
178
179#endif /* _PHAL_G4_SPI_H */
common_defs.h
Common defs for the entire firmware repository. Dont let this get too out of control please.
PHAL_SPI_writeByte
uint8_t PHAL_SPI_writeByte(SPI_InitConfig_t *spi, uint8_t address, uint8_t writeDat)
Blocking function to write a single byte to a SPI device. Useful for Initilization functions that jus...
Definition spi.c:440
PHAL_SPI_busy
bool PHAL_SPI_busy(SPI_InitConfig_t *cfg)
Check for current SPI transaction to complete.
Definition spi.c:215
PHAL_SPI_transfer_noDMA
bool PHAL_SPI_transfer_noDMA(SPI_InitConfig_t *spi, const uint8_t *out_data, uint32_t txlen, uint32_t rxlen, uint8_t *in_data)
SPI handle.
Definition spi.c:87
PHAL_SPI_init
bool PHAL_SPI_init(SPI_InitConfig_t *handle)
Initilize SPI peripheral with the configuired structure.
Definition spi.c:22
PHAL_SPI_transfer
bool PHAL_SPI_transfer(SPI_InitConfig_t *spi, const uint8_t *out_data, const uint32_t data_len, const uint8_t *in_data)
Transfer data_len bytes from out_data to SPI device and place MISO data in in_data This function just...
Definition spi.c:153
PHAL_SPI_readByte
uint8_t PHAL_SPI_readByte(SPI_InitConfig_t *spi, uint8_t address, bool skipDummy)
Blocking function to read a single byte from a SPI device. Useful for Initilization functions that ju...
Definition spi.c:421
dma.h
gpio.h
GPIO Driver for STM32L432 Devices.
rcc.h
RCC Configuration Driver for STM32F4 Devices.
SPI_InitConfig_t
Configuration entry for SPI initilization.
Definition spi.h:26
dma_init_t
Definition dma.h:17