PER Firmware
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Variables
g474ret6.h File Reference

Common G4 pin definitions for RET6 package. More...

#include "stm32g474xx.h"
#include "common/phal_G4/gpio/gpio.h"
Include dependency graph for g474ret6.h:
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Go to the source code of this file.

Variables

static constexpr uint8_t PHAL_PIN_DEFS_AF_NUM_FDCAN1 = 9
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN1_RX_PA11 = PHAL_GPIO_INIT_AF(GPIOA, 11, PHAL_PIN_DEFS_AF_NUM_FDCAN1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN1_TX_PA12 = PHAL_GPIO_INIT_AF(GPIOA, 12, PHAL_PIN_DEFS_AF_NUM_FDCAN1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN1_RX_PB8 = PHAL_GPIO_INIT_AF(GPIOB, 8, PHAL_PIN_DEFS_AF_NUM_FDCAN1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN1_TX_PB9 = PHAL_GPIO_INIT_AF(GPIOB, 9, PHAL_PIN_DEFS_AF_NUM_FDCAN1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static constexpr uint8_t PHAL_PIN_DEFS_AF_NUM_FDCAN2 = 9
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN2_RX_PB12 = PHAL_GPIO_INIT_AF(GPIOB, 12, PHAL_PIN_DEFS_AF_NUM_FDCAN2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN2_TX_PB13 = PHAL_GPIO_INIT_AF(GPIOB, 13, PHAL_PIN_DEFS_AF_NUM_FDCAN2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN2_RX_PB5 = PHAL_GPIO_INIT_AF(GPIOB, 5, PHAL_PIN_DEFS_AF_NUM_FDCAN2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN2_TX_PB6 = PHAL_GPIO_INIT_AF(GPIOB, 6, PHAL_PIN_DEFS_AF_NUM_FDCAN2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static constexpr uint8_t PHAL_PIN_DEFS_AF_NUM_FDCAN3 = 11
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN3_RX_PA8 = PHAL_GPIO_INIT_AF(GPIOA, 8, PHAL_PIN_DEFS_AF_NUM_FDCAN3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN3_TX_PB4 = PHAL_GPIO_INIT_AF(GPIOB, 4, PHAL_PIN_DEFS_AF_NUM_FDCAN3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN3_RX_PA15 = PHAL_GPIO_INIT_AF(GPIOA, 15, PHAL_PIN_DEFS_AF_NUM_FDCAN3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN3_TX_PB3 = PHAL_GPIO_INIT_AF(GPIOB, 3, PHAL_PIN_DEFS_AF_NUM_FDCAN3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static constexpr uint8_t PHAL_PIN_DEFS_AF_NUM_USART1 = 7
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART1_TX_PA9 = PHAL_GPIO_INIT_AF(GPIOA, 9, PHAL_PIN_DEFS_AF_NUM_USART1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART1_RX_PA10 = PHAL_GPIO_INIT_AF(GPIOA, 10, PHAL_PIN_DEFS_AF_NUM_USART1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
 
static constexpr uint8_t PHAL_PIN_DEFS_AF_NUM_USART2 = 7
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART2_TX_PA2 = PHAL_GPIO_INIT_AF(GPIOA, 2, PHAL_PIN_DEFS_AF_NUM_USART2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART2_RX_PA3 = PHAL_GPIO_INIT_AF(GPIOA, 3, PHAL_PIN_DEFS_AF_NUM_USART2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART2_TX_PD5 = PHAL_GPIO_INIT_AF(GPIOD, 5, PHAL_PIN_DEFS_AF_NUM_USART2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART2_RX_PD6 = PHAL_GPIO_INIT_AF(GPIOD, 6, PHAL_PIN_DEFS_AF_NUM_USART2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
 
static constexpr uint8_t PHAL_PIN_DEFS_AF_NUM_USART3 = 7
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART3_TX_PC10 = PHAL_GPIO_INIT_AF(GPIOC, 10, PHAL_PIN_DEFS_AF_NUM_USART3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART3_RX_PC11 = PHAL_GPIO_INIT_AF(GPIOC, 11, PHAL_PIN_DEFS_AF_NUM_USART3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART3_TX_PB10 = PHAL_GPIO_INIT_AF(GPIOB, 10, PHAL_PIN_DEFS_AF_NUM_USART3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART3_RX_PB11 = PHAL_GPIO_INIT_AF(GPIOB, 11, PHAL_PIN_DEFS_AF_NUM_USART3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
 
static constexpr uint8_t PHAL_PIN_DEFS_AF_NUM_SPI1 = 5
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI1_SCK_PA5 = PHAL_GPIO_INIT_AF(GPIOA, 5, PHAL_PIN_DEFS_AF_NUM_SPI1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI1_MISO_PA6 = PHAL_GPIO_INIT_AF(GPIOA, 6, PHAL_PIN_DEFS_AF_NUM_SPI1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_PULL_UP)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI1_MOSI_PA7 = PHAL_GPIO_INIT_AF(GPIOA, 7, PHAL_PIN_DEFS_AF_NUM_SPI1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI1_NSS_PA4 = PHAL_GPIO_INIT_AF(GPIOA, 4, PHAL_PIN_DEFS_AF_NUM_SPI1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI1_NSS_PA15 = PHAL_GPIO_INIT_AF(GPIOA, 15, PHAL_PIN_DEFS_AF_NUM_SPI1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static constexpr uint8_t PHAL_PIN_DEFS_AF_NUM_SPI2 = 5
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI2_SCK_PB13 = PHAL_GPIO_INIT_AF(GPIOB, 13, PHAL_PIN_DEFS_AF_NUM_SPI2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI2_MISO_PB14 = PHAL_GPIO_INIT_AF(GPIOB, 14, PHAL_PIN_DEFS_AF_NUM_SPI2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_PULL_UP)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI2_MOSI_PB15 = PHAL_GPIO_INIT_AF(GPIOB, 15, PHAL_PIN_DEFS_AF_NUM_SPI2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 
static const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI2_NSS_PB12 = PHAL_GPIO_INIT_AF(GPIOB, 12, PHAL_PIN_DEFS_AF_NUM_SPI2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
 

Detailed Description

Common G4 pin definitions for RET6 package.

Author
Millan Kumar (kumar.nosp@m.798@.nosp@m.purdu.nosp@m.e.ed.nosp@m.u)

AF mapping table: Table 13 from STM32G474xB/xC/xE. Add more to this file as needed.

Variable Documentation

◆ PHAL_PIN_DEFS_AF_NUM_FDCAN1

uint8_t PHAL_PIN_DEFS_AF_NUM_FDCAN1 = 9
staticconstexpr

◆ PHAL_PIN_DEFS_AF_NUM_FDCAN2

uint8_t PHAL_PIN_DEFS_AF_NUM_FDCAN2 = 9
staticconstexpr

◆ PHAL_PIN_DEFS_AF_NUM_FDCAN3

uint8_t PHAL_PIN_DEFS_AF_NUM_FDCAN3 = 11
staticconstexpr

◆ PHAL_PIN_DEFS_AF_NUM_SPI1

uint8_t PHAL_PIN_DEFS_AF_NUM_SPI1 = 5
staticconstexpr

◆ PHAL_PIN_DEFS_AF_NUM_SPI2

uint8_t PHAL_PIN_DEFS_AF_NUM_SPI2 = 5
staticconstexpr

◆ PHAL_PIN_DEFS_AF_NUM_USART1

uint8_t PHAL_PIN_DEFS_AF_NUM_USART1 = 7
staticconstexpr

◆ PHAL_PIN_DEFS_AF_NUM_USART2

uint8_t PHAL_PIN_DEFS_AF_NUM_USART2 = 7
staticconstexpr

◆ PHAL_PIN_DEFS_AF_NUM_USART3

uint8_t PHAL_PIN_DEFS_AF_NUM_USART3 = 7
staticconstexpr

◆ PHAL_PIN_DEFS_FDCAN1_RX_PA11

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN1_RX_PA11 = PHAL_GPIO_INIT_AF(GPIOA, 11, PHAL_PIN_DEFS_AF_NUM_FDCAN1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_FDCAN1_RX_PB8

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN1_RX_PB8 = PHAL_GPIO_INIT_AF(GPIOB, 8, PHAL_PIN_DEFS_AF_NUM_FDCAN1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_FDCAN1_TX_PA12

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN1_TX_PA12 = PHAL_GPIO_INIT_AF(GPIOA, 12, PHAL_PIN_DEFS_AF_NUM_FDCAN1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_FDCAN1_TX_PB9

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN1_TX_PB9 = PHAL_GPIO_INIT_AF(GPIOB, 9, PHAL_PIN_DEFS_AF_NUM_FDCAN1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_FDCAN2_RX_PB12

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN2_RX_PB12 = PHAL_GPIO_INIT_AF(GPIOB, 12, PHAL_PIN_DEFS_AF_NUM_FDCAN2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_FDCAN2_RX_PB5

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN2_RX_PB5 = PHAL_GPIO_INIT_AF(GPIOB, 5, PHAL_PIN_DEFS_AF_NUM_FDCAN2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_FDCAN2_TX_PB13

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN2_TX_PB13 = PHAL_GPIO_INIT_AF(GPIOB, 13, PHAL_PIN_DEFS_AF_NUM_FDCAN2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_FDCAN2_TX_PB6

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN2_TX_PB6 = PHAL_GPIO_INIT_AF(GPIOB, 6, PHAL_PIN_DEFS_AF_NUM_FDCAN2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_FDCAN3_RX_PA15

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN3_RX_PA15 = PHAL_GPIO_INIT_AF(GPIOA, 15, PHAL_PIN_DEFS_AF_NUM_FDCAN3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_FDCAN3_RX_PA8

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN3_RX_PA8 = PHAL_GPIO_INIT_AF(GPIOA, 8, PHAL_PIN_DEFS_AF_NUM_FDCAN3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_FDCAN3_TX_PB3

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN3_TX_PB3 = PHAL_GPIO_INIT_AF(GPIOB, 3, PHAL_PIN_DEFS_AF_NUM_FDCAN3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_FDCAN3_TX_PB4

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_FDCAN3_TX_PB4 = PHAL_GPIO_INIT_AF(GPIOB, 4, PHAL_PIN_DEFS_AF_NUM_FDCAN3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_SPI1_MISO_PA6

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI1_MISO_PA6 = PHAL_GPIO_INIT_AF(GPIOA, 6, PHAL_PIN_DEFS_AF_NUM_SPI1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_PULL_UP)
static

◆ PHAL_PIN_DEFS_SPI1_MOSI_PA7

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI1_MOSI_PA7 = PHAL_GPIO_INIT_AF(GPIOA, 7, PHAL_PIN_DEFS_AF_NUM_SPI1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_SPI1_NSS_PA15

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI1_NSS_PA15 = PHAL_GPIO_INIT_AF(GPIOA, 15, PHAL_PIN_DEFS_AF_NUM_SPI1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_SPI1_NSS_PA4

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI1_NSS_PA4 = PHAL_GPIO_INIT_AF(GPIOA, 4, PHAL_PIN_DEFS_AF_NUM_SPI1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_SPI1_SCK_PA5

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI1_SCK_PA5 = PHAL_GPIO_INIT_AF(GPIOA, 5, PHAL_PIN_DEFS_AF_NUM_SPI1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_SPI2_MISO_PB14

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI2_MISO_PB14 = PHAL_GPIO_INIT_AF(GPIOB, 14, PHAL_PIN_DEFS_AF_NUM_SPI2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_PULL_UP)
static

◆ PHAL_PIN_DEFS_SPI2_MOSI_PB15

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI2_MOSI_PB15 = PHAL_GPIO_INIT_AF(GPIOB, 15, PHAL_PIN_DEFS_AF_NUM_SPI2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_SPI2_NSS_PB12

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI2_NSS_PB12 = PHAL_GPIO_INIT_AF(GPIOB, 12, PHAL_PIN_DEFS_AF_NUM_SPI2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_SPI2_SCK_PB13

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_SPI2_SCK_PB13 = PHAL_GPIO_INIT_AF(GPIOB, 13, PHAL_PIN_DEFS_AF_NUM_SPI2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_USART1_RX_PA10

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART1_RX_PA10 = PHAL_GPIO_INIT_AF(GPIOA, 10, PHAL_PIN_DEFS_AF_NUM_USART1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_USART1_TX_PA9

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART1_TX_PA9 = PHAL_GPIO_INIT_AF(GPIOA, 9, PHAL_PIN_DEFS_AF_NUM_USART1, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_USART2_RX_PA3

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART2_RX_PA3 = PHAL_GPIO_INIT_AF(GPIOA, 3, PHAL_PIN_DEFS_AF_NUM_USART2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_USART2_RX_PD6

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART2_RX_PD6 = PHAL_GPIO_INIT_AF(GPIOD, 6, PHAL_PIN_DEFS_AF_NUM_USART2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_USART2_TX_PA2

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART2_TX_PA2 = PHAL_GPIO_INIT_AF(GPIOA, 2, PHAL_PIN_DEFS_AF_NUM_USART2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_USART2_TX_PD5

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART2_TX_PD5 = PHAL_GPIO_INIT_AF(GPIOD, 5, PHAL_PIN_DEFS_AF_NUM_USART2, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_USART3_RX_PB11

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART3_RX_PB11 = PHAL_GPIO_INIT_AF(GPIOB, 11, PHAL_PIN_DEFS_AF_NUM_USART3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_USART3_RX_PC11

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART3_RX_PC11 = PHAL_GPIO_INIT_AF(GPIOC, 11, PHAL_PIN_DEFS_AF_NUM_USART3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_OPEN_DRAIN, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_USART3_TX_PB10

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART3_TX_PB10 = PHAL_GPIO_INIT_AF(GPIOB, 10, PHAL_PIN_DEFS_AF_NUM_USART3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static

◆ PHAL_PIN_DEFS_USART3_TX_PC10

const PHAL_GPIO_InitConfig_t PHAL_PIN_DEFS_USART3_TX_PC10 = PHAL_GPIO_INIT_AF(GPIOC, 10, PHAL_PIN_DEFS_AF_NUM_USART3, GPIO_OUTPUT_ULTRA_SPEED, GPIO_OUTPUT_PUSH_PULL, GPIO_INPUT_OPEN_DRAIN)
static