PER Firmware
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SPI_InitConfig_t Struct Reference

Configuration entry for SPI initilization. More...

#include <spi.h>

Collaboration diagram for SPI_InitConfig_t:
[legend]

Public Attributes

uint32_t data_rate
 Target baudrate in b/s (might be different depending on peripheral clock divison)
 
uint8_t data_len
 Number of bits per transaction.
 
bool nss_sw
 Save Select controlled by Software.
 
GPIO_TypeDef * nss_gpio_port
 GPIO Port of SPI CS Pin.
 
uint32_t nss_gpio_pin
 GPIO Pin of SPI CS Pin.
 
dma_init_trx_dma_cfg
 DMA initilization for RX transfer.
 
dma_init_ttx_dma_cfg
 DMA initilization for TX transfer.
 
volatile bool _busy
 SPI Peripheral currently in a transaction.
 
volatile bool _error
 SPI Peripheral current transaction error.
 
volatile bool _direct_mode_error
 DMA error while attempting to operate in direct mode.
 
volatile bool _fifo_overrun
 DMA FIFO has been overrun - this should never occur, as it should never be enabled.
 
SPI_TypeDef * periph
 SPI Peripheral.
 
SPI_Mode mode
 
SPI_CPOL cpol
 
SPI_CPHA cpha
 
PHAL_DMA_Handle_trx_dma
 
PHAL_DMA_Handle_ttx_dma
 

Detailed Description

Configuration entry for SPI initilization.

SPI peripheral configuration.

Member Data Documentation

◆ _busy

volatile bool SPI_InitConfig_t::_busy

SPI Peripheral currently in a transaction.

Internal transfer busy flag

◆ _direct_mode_error

volatile bool SPI_InitConfig_t::_direct_mode_error

DMA error while attempting to operate in direct mode.

Internal DMA direct mode error flag

◆ _error

volatile bool SPI_InitConfig_t::_error

SPI Peripheral current transaction error.

Internal DMA transfer error flag

◆ _fifo_overrun

volatile bool SPI_InitConfig_t::_fifo_overrun

DMA FIFO has been overrun - this should never occur, as it should never be enabled.

Internal DMA FIFO overrun flag

◆ cpha

SPI_CPHA SPI_InitConfig_t::cpha

Clock sampling phase

◆ cpol

SPI_CPOL SPI_InitConfig_t::cpol

Clock idle polarity

◆ data_len

uint8_t SPI_InitConfig_t::data_len

Number of bits per transaction.

Transfer width in bits

◆ data_rate

uint32_t SPI_InitConfig_t::data_rate

Target baudrate in b/s (might be different depending on peripheral clock divison)

Desired SPI clock frequency (Hz)

◆ mode

SPI_Mode SPI_InitConfig_t::mode

Master or slave mode

◆ nss_gpio_pin

uint32_t SPI_InitConfig_t::nss_gpio_pin

GPIO Pin of SPI CS Pin.

Chip select GPIO pin (master only)

◆ nss_gpio_port

GPIO_TypeDef * SPI_InitConfig_t::nss_gpio_port

GPIO Port of SPI CS Pin.

Chip select GPIO port (master only)

◆ nss_sw

bool SPI_InitConfig_t::nss_sw

Save Select controlled by Software.

true = software-controlled chip select

◆ periph

SPI_TypeDef * SPI_InitConfig_t::periph

SPI Peripheral.

SPI peripheral instance

◆ rx_dma

PHAL_DMA_Handle_t* SPI_InitConfig_t::rx_dma

RX DMA handle (required, all transfers are DMA backed)

◆ rx_dma_cfg

dma_init_t* SPI_InitConfig_t::rx_dma_cfg

DMA initilization for RX transfer.

◆ tx_dma

PHAL_DMA_Handle_t* SPI_InitConfig_t::tx_dma

TX DMA handle (required, all transfers are DMA backed)

◆ tx_dma_cfg

dma_init_t* SPI_InitConfig_t::tx_dma_cfg

DMA initilization for TX transfer.


The documentation for this struct was generated from the following files: