fdcan_priv.c File Reference

G4 FDCAN private/register level implementation. More...

#include "common/phal_G4/fdcan/fdcan.h"
#include "common/phal_G4/fdcan/fdcan_priv.h"

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Functions
uint32_t	PHAL_FDCAN_priv_ramBase (const FDCAN_GlobalTypeDef *fdcan)
	Base address of this peripheral's slice of shared message RAM.
void	PHAL_FDCAN_priv_enableClock (void)
	Enable FDCAN kernel + peripheral clocks (PCLK1)
void	PHAL_FDCAN_priv_enterConfig (FDCAN_GlobalTypeDef *fdcan)
	Enter INIT mode and unlock configuration registers. Blocks until entered.
void	PHAL_FDCAN_priv_exitConfig (FDCAN_GlobalTypeDef *fdcan)
	Leave INIT mode, ending configuration. Blocks until left.
void	PHAL_FDCAN_priv_controlConfig (FDCAN_GlobalTypeDef *fdcan)
void	PHAL_FDCAN_priv_setTransmitFifoQueueModeToFifo (FDCAN_GlobalTypeDef *fdcan)
	Set TX FIFO/Queue mode to FIFO (not queue)
void	PHAL_FDCAN_setInterruptLines (FDCAN_GlobalTypeDef *fdcan)
	Set up RX new message -> line 0, TX complete -> line 1.
void	PHAL_FDCAN_priv_writeFilterAction (FDCAN_GlobalTypeDef *fdcan, PHAL_FDCAN_DefaultFilterAction_t action)
	Write a filter action to RXGFC (accept/reject all)
uint32_t	PHAL_FDCAN_priv_getNBTP (PHAL_FDCAN_BaudRate_t bit_rate)
void	PHAL_FDCAN_priv_writeStandardFilters (FDCAN_GlobalTypeDef *fdcan, const uint32_t *sid_list, uint32_t num_sid)
	Set num_sid exact-match standard filters and forward to RX FIFO0.
void	PHAL_FDCAN_priv_writeExtendedFilters (FDCAN_GlobalTypeDef *fdcan, const uint32_t *xid_list, uint32_t num_xid)
	Set num_xid exact-match extended filters and forward to RX FIFO0.
void	PHAL_FDCAN_priv_writeTxElement (FDCAN_GlobalTypeDef *fdcan, CanMsgTypeDef_t *msg)
bool	PHAL_FDCAN_priv_readRxElement (FDCAN_GlobalTypeDef *fdcan, CanMsgTypeDef_t *msg)
	Pop and decode the oldest element from RX FIFO0.
bool	PHAL_FDCAN_priv_readTxFifoQueueStatusFullFlag (const FDCAN_GlobalTypeDef *fdcan)
	Check whether the TX FIFO/Queue is full.
bool	PHAL_FDCAN_priv_readReceiveFifo0NewMessageInterruptFlag (const FDCAN_GlobalTypeDef *fdcan)
	Check whether the RX FIFO0 new message interrupt flag is set.
void	PHAL_FDCAN_priv_clearReceiveFifo0NewMessageInterruptFlag (FDCAN_GlobalTypeDef *fdcan)
	Clear the RX FIFO0 new message interrupt flag.
bool	PHAL_FDCAN_priv_readTransmitCompleteInterruptFlag (const FDCAN_GlobalTypeDef *fdcan)
	Check whether the TX complete interrupt flag is set.
void	PHAL_FDCAN_priv_clearTransmitCompleteInterruptFlag (FDCAN_GlobalTypeDef *fdcan)
	Clear the TX complete interrupt flag.

Detailed Description

G4 FDCAN private/register level implementation.

Author

Millan Kumar (kumar.nosp@m.798@.nosp@m.purdu.nosp@m.e.ed.nosp@m.u)

Function Documentation

PHAL_FDCAN_priv_clearReceiveFifo0NewMessageInterruptFlag()

void PHAL_FDCAN_priv_clearReceiveFifo0NewMessageInterruptFlag

(

FDCAN_GlobalTypeDef *

fdcan

)

Clear the RX FIFO0 new message interrupt flag.

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PHAL_FDCAN_priv_clearTransmitCompleteInterruptFlag()

void PHAL_FDCAN_priv_clearTransmitCompleteInterruptFlag

(

FDCAN_GlobalTypeDef *

fdcan

)

Clear the TX complete interrupt flag.

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PHAL_FDCAN_priv_controlConfig()

void PHAL_FDCAN_priv_controlConfig

(

FDCAN_GlobalTypeDef *

fdcan

)

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PHAL_FDCAN_priv_enableClock()

void PHAL_FDCAN_priv_enableClock

(

void

)

Enable FDCAN kernel + peripheral clocks (PCLK1)

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PHAL_FDCAN_priv_enterConfig()

void PHAL_FDCAN_priv_enterConfig

(

FDCAN_GlobalTypeDef *

fdcan

)

Enter INIT mode and unlock configuration registers. Blocks until entered.

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PHAL_FDCAN_priv_exitConfig()

void PHAL_FDCAN_priv_exitConfig

(

FDCAN_GlobalTypeDef *

fdcan

)

Leave INIT mode, ending configuration. Blocks until left.

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PHAL_FDCAN_priv_getNBTP()

uint32_t PHAL_FDCAN_priv_getNBTP

(

PHAL_FDCAN_BaudRate_t

bit_rate

)

Compute the NBTP register value for one of the supported bit rates. 16-time-quantum nominal bit time (~87.5% sample point)

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PHAL_FDCAN_priv_ramBase()

uint32_t PHAL_FDCAN_priv_ramBase

(

const FDCAN_GlobalTypeDef *

fdcan

)

Base address of this peripheral's slice of shared message RAM.

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PHAL_FDCAN_priv_readReceiveFifo0NewMessageInterruptFlag()

bool PHAL_FDCAN_priv_readReceiveFifo0NewMessageInterruptFlag

(

const FDCAN_GlobalTypeDef *

fdcan

)

Check whether the RX FIFO0 new message interrupt flag is set.

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PHAL_FDCAN_priv_readRxElement()

bool PHAL_FDCAN_priv_readRxElement	(	FDCAN_GlobalTypeDef *	fdcan,
		CanMsgTypeDef_t *	msg )

Pop and decode the oldest element from RX FIFO0.

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PHAL_FDCAN_priv_readTransmitCompleteInterruptFlag()

bool PHAL_FDCAN_priv_readTransmitCompleteInterruptFlag

(

const FDCAN_GlobalTypeDef *

fdcan

)

Check whether the TX complete interrupt flag is set.

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PHAL_FDCAN_priv_readTxFifoQueueStatusFullFlag()

bool PHAL_FDCAN_priv_readTxFifoQueueStatusFullFlag

(

const FDCAN_GlobalTypeDef *

fdcan

)

Check whether the TX FIFO/Queue is full.

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PHAL_FDCAN_priv_setTransmitFifoQueueModeToFifo()

void PHAL_FDCAN_priv_setTransmitFifoQueueModeToFifo

(

FDCAN_GlobalTypeDef *

fdcan

)

Set TX FIFO/Queue mode to FIFO (not queue)

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PHAL_FDCAN_priv_writeExtendedFilters()

void PHAL_FDCAN_priv_writeExtendedFilters	(	FDCAN_GlobalTypeDef *	fdcan,
		const uint32_t *	xid_list,
		uint32_t	num_xid )

Set num_xid exact-match extended filters and forward to RX FIFO0.

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PHAL_FDCAN_priv_writeFilterAction()

void PHAL_FDCAN_priv_writeFilterAction	(	FDCAN_GlobalTypeDef *	fdcan,
		PHAL_FDCAN_DefaultFilterAction_t	action )

Write a filter action to RXGFC (accept/reject all)

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PHAL_FDCAN_priv_writeStandardFilters()

void PHAL_FDCAN_priv_writeStandardFilters	(	FDCAN_GlobalTypeDef *	fdcan,
		const uint32_t *	sid_list,
		uint32_t	num_sid )

Set num_sid exact-match standard filters and forward to RX FIFO0.

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PHAL_FDCAN_priv_writeTxElement()

void PHAL_FDCAN_priv_writeTxElement	(	FDCAN_GlobalTypeDef *	fdcan,
		CanMsgTypeDef_t *	msg )

Write one classic-CAN TX element for msg into the next free TX FIFO slot Not safe to call if the TX FIFO is full

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PHAL_FDCAN_setInterruptLines()

void PHAL_FDCAN_setInterruptLines

(

FDCAN_GlobalTypeDef *

fdcan

)

Set up RX new message -> line 0, TX complete -> line 1.

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